GRLIB=../..
TOP=leon3mp
BOARD=ut699rh-evab
include $(GRLIB)/boards/$(BOARD)/Makefile.inc
DEVICE=$(PART)-$(PACKAGE)$(SPEED)
#UCF=$(GRLIB)/boards/$(BOARD)/$(TOP).ucf
UCF=$(TOP).ucf
QSF=$(GRLIB)/boards/$(BOARD)/$(TOP).qsf
EFFORT=high
XSTOPT=
VHDLSYNFILES=config.vhd  leon3core.vhd core.vhd \
	pads.vhd leon3mp.vhd
VHDLSIMFILES=testbench.vhd
SIMTOP=testbench
SDCFILE=default.sdc
#SDCFILE=$(GRLIB)/boards/$(BOARD)/default.sdc
BITGEN=$(GRLIB)/boards/$(BOARD)/default.ut
CLEAN=soft-clean
ISEMPAOPT=-timing
SYNPOPT="set_option -pipe 1; set_option -retiming 1"

TECHLIBS = unisim
LIBSKIP = core1553bbc core1553brm core1553brt gr1553 corePCIF \
	tmtc openchip hynix cypress ihp gleichmann
DIRSKIP = b1553 pcif leon2 leon2ft crypto satcan ddr ata usb usbhc \
	leon4 leon4b64 l2cache slink ascs pwm haps coremp7 gr1553b iommu
FILESKIP = grcan.vhd


include $(GRLIB)/bin/Makefile
include $(GRLIB)/software/leon3/Makefile


##################  project specific targets ##########################
